| PART |
Description |
Maker |
| MC100LVEL29DWR2 |
3.3V ECL Dual Differential Data and Clock D Flip−Flop With Set and Reset 100LVEL SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO20
|
ON Semiconductor
|
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| ACTS74HMSR-02 |
Dual D Type Flip Flop with Set and Reset, Advanced Logic, CMOS; Temperature Range: -55°C to 125°C; Package: Die (Military Visual) ACT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC14
|
Intersil, Corp.
|
| MM74C74N MM74C74 MM74C74M MM74C74MX |
Dual D Flip-Flop; Package: SOIC; No of Pins: 14; Container: Tape & Reel CMOS SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
From old datasheet system
Dual D-Type Flip-Flop
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| IN74VHCT74N IN74VHCT74 IN74VHCT74D |
Dual D Flip-Flop with Set and Reset
|
INTEGRAL[Integral Corp.]
|
| CD54AC109 CD54AC103A CD54ACT109 CD54ACT103A CD54AC |
Dual J-K Flip-Flop with Set and Reset
|
INTERSIL[Intersil Corporation]
|
| 74LVC74A |
Dual D-type flip-flop with set and
|
Philips
|
| MC74HC74ADG MC74HC74ADR2G MC74HC74ADTR2G MC74HC74A |
Dual D Flip-Flop with Set and Reset
|
ON Semiconductor
|
| 74HC_HCT74 |
Dual D-type flip-flop with set and
|
Philips
|
| IN74ACT112N IN74ACT112 IN74ACT112D |
DUAL J-K FLIP-FLOP WITH SET AND RESET 双JK触发器与SET和RESET
|
INTEGRAL JOINT STOCK COMPANY
INTEGRAL[Integral Corp.]
|
| MC74VHC74DR2G MC74VHC74DR2 MC74VHC74DTR2 MC74VHC74 |
Dual D?Type Flip?Flop with Set and Reset
Dual D−Type Flip−Flop with Set and Reset
|
ONSEMI[ON Semiconductor]
|
